Design-Reuse4 年
PLDA demonstrates successful PCIe 5.0 Link Training at 32 GT/s with its PCIe 5.0 controller ...
The demo showcases stable PCIe 5.0 Link Training (32 GT/s) and exceptional signal integrity with a Broadcom® PCIe 5.0 PHY platform. This solution is based on the XpressRICH® IP Controller for PCIe 5.0 ...
Hackaday4 年
Adding PCIe To Your Raspberry Pi 4, The Easier Way
Ever since people figured out that the Raspberry Pi 4 has a PCIe bus, the race was on to be the first to connect a regular PCIe expansion card to a Raspberry Pi 4 SBC. Now [Zak Kemble] has created ...
Design-Reuse4 年
PCIe error logging and handling on a typical SoC
This is third layer which is responsible for link training and transaction handling at interface level. These errors are checked at requester, switch and completer. Correctable errors are the errors ...